Electron. Mater. Lett., Vol. 9, No. 6 (2013), pp. 763-766 DOI: 10.1007/s13391-013-6006-6
3-D Perpendicular Assembly of SWNTs for CMOS Interconnects Tae-Hoon Kim, Cihan Yilmaz, Sivasubramanian Somu, and Ahmed Busnaina* NSF Nanoscale Science and Engineering Center for High-rate Nanomanufacturing, Northeastern University, Boston MA, 02115, USA (received date: 19 October 2012 / accepted date: 9 January 2013 / published date: 10 November 2013) Due to their superior electrical properties such as high current density and ballistic transport, carbon nanotubes (CNT) are considered as a potential candidate for future very large scale integration (VLSI) interconnects. However, direct incorporation of CNTs into a complimentary metal oxide semiconductor (CMOS) architecture by the conventional chemical vapor deposition (CVD) growth method is problematic because it requires high temperatures that might damage insulators and doped semiconductors in the underlying CMOS circuits. In this paper, we present a directed assembly method to assemble aligned CNTs into pre-patterned vias perpendicular to the substrate. A dynamic electric field with a static offset is applied to provide the force needed for directing the SWNT assembly. It is also shown that by adjusting assembly parameters the density of the assembled CNTs can be significantly enhanced. This highly scalable directed assembly method is conducted at room temperature and pressure and is accomplished in a few minutes. I-V characterization of the assembled CNTs was conducted using a Zyvex nanomanipulator in a scanning electron microscope (SEM) and the measured value of the resistance was 270 kΩs. Keywords: carbon nanotubes, directed assembly, electrophoresis, dielectrophoresis, interconnects
1. INTRODUCTION As we approach the 22 nm node, which is less than the mean free path for copper, the resistivity of copper interconnects increases because of profoundly enhanced scattering of electrons at the edges and grain boundaries.[1] Thus the need for using alternative materials as interconnects is ever increasing. In addition to being ballistic conductors at small lengths scales, CNTs exhibit excellent current carrying capability[2] and therefore are considered as replacement candidates for copper interconnects for scales at 10 nm and below. Such CNT interconnects can decrease access time and cycle time with low energy dissipation[3] and are expected to be implemented in 2016 for the 10 nm node scale.[4] Recently, many researchers have shown that bundles of CNTs could be grown selectively in via holes using a CVD[5,6] method. However, this CNT growth (synthesis) requires temperatures in excess of 500°C - 600°C,[7-11] which damages insulators present in the underlying CMOS circuits. An alternative pathway is to massively assemble[12-14] vertically aligned CNTs in a parallel manner into the silicon through vias (STV) at room temperature and pressure. These assembly techniques need to be amenable to a CMOS process and must avoid the use of chemicals to minimize contamination that might otherwise lead to poor electrical properties. Of the *Corresponding author:
[email protected] ©KIM and Springer
several directed assembly techniques, electrophoresis (EP) and dielectrophoresis (DEP) seem to be good candidates to accomplish this process. These electric field assisted, directed assembly methods are used to assemble CNTs onto predefined electrodes[15-19] on a substrate. 3-D assembly of single-walled carbon nanotubes (SWNTs) bridging electrodes at different levels on the same substrate has been demonstrated.[20] SWNTs have also been assembled into porous alumina nanotemplates[21] using field-assisted assembly. In all these cases, the electrodes through which the electric field is applied lay on the same substrate on which these assembly techniques were carried out. Further, these electrodes were separated only by microns at the most. The directed assembly parameters need to be modified such that the assembly of carbon nanotubes can be achieved effectively using a counter electrode far from the via. In this paper, we use a combination of electrophoresis and DEP to assemble aligned SWNTs perpendicularly into prefabricated vias. To achieve this, a dynamic, time varying field was superimposed on a static field. We measured the resistance of the assembled SWNTs and compared it to that of CNT grown by CVD in vias.
2. EXPERIMENTAL PROCEDURE Microfabrication and e-beam lithography methods were used to create the templates with vias of various dimensions and arrays to mimic the STVs. Figure 1 shows schematics
764
T.-H. Kim et al.
Fig. 1. A schematic of the template and directed assembly process.
for the template fabrication and the directed assembly process. A 150 nm of gold (Au) was sputter deposited on a 500 nm thick silicon dioxide layer (SiO2), which was thermally grown on a silicon substrate. A 5 nm chromium film was used as the adhesion layer between the SiO2 layer and Au. Subsequently 600 nm thick Poly(methyl methacrylate) (PMMA) was spun coated and e-beam lithography was conducted on this template in a SUPRA 25 FESEM fitted with a RAITH beam blanker and controlled by a J. C. Nabity e-beam generation system. After the exposed PMMA was developed, the patterned template together with a counter electrode was dipped into the solution containing SWNTs. A 1 : 100 diluted solution of CMOS grade SWNTs procured from Brewer Scientific (CNTRENE C100LM) in deionized water was used. These SWNTs consisted of a mixture of semiconducting, and metallic SWNTs with diameters in the range of 1.1 - 1.25 nm and an average length of 2 microns. Next an alternating field at a frequency of 100 KHz with an amplitude of 12 V was applied between the template and the counter electrode. In addition, a DC offset of +2 V was applied to the patterned template. After 90 sec, the template was withdrawn from the solution. Electrical characterization was carried out in a SEM with the help of a ZYVEX (S100) nanomanipulator. Tungsten probes with a tip radius of ~20 nm were used for making the contact to the carbon nanotubes and the gold electrode.
3. RESULTS AND DISCUSSION During electrophoresis, the force acting on the particles is influenced by the charge on the nanoelements and the applied field: Fe = qE
(1)
where q is the charge on the nanoelement and E is the strength of the applied field. Therefore, to employ electrophoresis for assembly of nanoelements, they need to have a charge. Carbon nanotubes have defects at the ends due to acid treatment employed for catalyst removal, which also shortens the SWNTs length. When suspended in water, these carbon nanotubes acquire carboxyl-terminated groups,
Fig. 2. Assembly result for various electric field driven assemblies. (a) Constant applied DC voltage. (b) Time varying alternating voltage (c) Result for a DC voltage OFFSET applied in addition to the time varying alternating voltage.
which give them negative charges. When electrophoresis alone is applied, these carbon nanotubes assemble into the trenches without alignment in a random manner as shown in Fig. 2(a). On the other hand, DEP is dependent on the field gradient and acts on the dipoles present in the nanoelements. The DEP force acting on the nanotube is given by[22-26] π 2 2 FDEP = --- r lεsRe { κ( ω ) }∇Erms 6
(2)
where l and r are respectively the length and radius of the nanotube, εs is the real permittivity of the solution, Erms is the root mean square value of the applied electric field, and * * * κ( ω ) = ( εn – εs )/εs is the usual Clausius-Mosotti factor. Thus the frequency dependent dielectric constant of the solution and that of the nanoelement determine the sign and strength of the DEP force. It has been shown that DEP can be used to align the carbon nanotubes along the field lines.[20] When DEP alone was applied in the form of an alternating field, no assembly occurred as shown in Fig. 2(b) since there was no attractive force pulling the nanotubes towards the template. When a DC offset was applied to the template in addition to the alternating voltage, the SWNTs in the solution experienced a pulling force in addition to being aligned due to the alternating field. As a result, the SWNTs that were assembled into the vias were aligned perpendicular to the substrates as shown in Fig. 2(c). A schematic diagram of the electrical characterization setup is shown as an inset in Fig. 3. The ZYVEX nanomanipulator was used to make contacts with the assembled SWNTs and the plain Au electrode. The observed I-V characteristics are plotted in Fig. 3. The plot shows that the measured current increased linearly with respect to the
Electron. Mater. Lett. Vol. 9, No. 6 (2013)
T.-H. Kim et al.
765
and Manufacturing Research Center at Northeastern University. The authors would like to thank Brewer Science, Inc., for supplying the CMOS grade single-walled carbon nanotubes solution.
REFERENCES
Fig. 3. Plot of I-V characteristics measured using a ZYVEX nanomanipulator in a SEM. The observed resistance is 270 kΩs. The inset is a schematic of the experimental setup.
applied voltage indicating ohmic behavior. The calculated resistance for the SWNT bundle was 270 kΩ. This corresponds to an equivalent resistivity of 1.4 × 10−4 Ωm for dimensions of 20 nm wide and 600 nm height. Since the diameter of probe tip that makes contact is 20 nm, we used this value for determining the resistivity. The following reasons might have contributed to the high value of the resistivity: (a) The SWNTs were a mixture of semiconducting and metallic tubes, so only a part of the tubes might have been taking part in the conduction between the Au electrode and the tungsten probe and (b) Since the contact made by the SWNTs to the electrode and to the tungsten probe was physical rather than chemical, one can expect contact resistances to be high.
4. CONCLUSIONS We used a combination of electrophoresis and DEP to assemble aligned SWNTs perpendicularly into pre-patterned vias that were fabricated on a template by conventional microfabrication and an e-beam lithography technique. The high resistivity observed is a reflection of the mixed nanotubes that were used. If metallic nanotubes were used instead of the mixed tubes one can expect a much lower resistivity close to the targeted value mentioned in ITRS roadmap. The proposed method can also be used with minimal assembly parametric modifications for assembling a wide variety nanotubes made up of different materials for a variety of applications such as optical interconnect, solar cells, etc.
ACKNOWLEDGMENTS This study was supported by the National Science Foundation Nanoscale Science and Engineering Center for High-rate Nanomanufacturing (grant no. 0832785). Experiments were conducted at the George J. Kostas Nanoscale Technology
1. K. Banerjee and N. Srivastava, Proc. of the 43rd Annual Design Automation Conference, p. 809, ACM, San Francisco, USA (2006). 2. P. Avouris, J. Appenzeller, R. Martel, and S. J. Wind, Proc. IEEE 91, 1772 (2003). 3. A. P. Graham, G. S. Duesberg, W. Hoenlein, F. Kreupl, M. Liebau, R. Martin, B. Rajasekharan, W. Pamler, R. Seidel, W. Steinhoegl, and E. Unger, Appl. Phys. A 80, 1141 (2005). 4. International Technology Roadmap for Semiconductors (2012). http://itrs.net 5. M. Nihei, A. Kawabata, D. Kondo, M. Horibe, S. Sato, and Y. Awano, Jpn. J. Appl. Phys. 44, 1626 (2005). 6. J. Li, Q. Ye, A. Cassell, H. T. Ng, R. Stevens, J. Han, and M. Meyyappan, Appl. Phys. Lett. 82, 2491 (2003). 7. D. S. Bethune, C. H. Klang, M. S. de Vries, G. Gorman, R. Savoy, J. Vazquez, and R. Beyers, Nature 363, 605 (1993). 8. J. Kong, H. T. Soh, A. M. Cassel, C. R. Quate, and H. Dai, Nature 395, 878 (1998). 9. N. Sinha, J. Ma, and J. T. W. Yeow, JNN 6, 573 (2006). 10. W. Zhao, M .J. Lee, H. T. Kim, and I. J. Kim, Electron. Mater. Lett. 7, 139 (2011). 11. S.-H. Lee and G.-H. Jeong, Electron. Mater. Lett. 8, 5 (2012). 12. K. Yamamoto, S. Akita, and Y. Nakayama, J. Phys D 31, L34 (1998). 13. D. P. Long, J. L. Lazorcik, and R. Shashidhar, Adv. Mater. 16, 81 (2004). 14. S. G. Rao, L. Huang, W. Setyawan, and S. Hong, Nature 425, 36 (2003). 15. P. Makaram, S. Somu, X. Xiong, A. Busnaina, Y. J. Jung, and N. McGruer, Appl. Phys. Lett. 90, 243108 (2007). 16. J. Chung, K. H. Lee, J. Lee, and R. S. Ruoff, Langmuir 20, 3011 (2004). 17. P. G. Collins, M. S. Arnold, and P. Avouris, Science 292, 706 (2001). 18. J. Suehiro, G. Zhou, and M. Hara, J. Phys. D 36, L109 (2003). 19. J. Chung, K. H. Lee, J. Lee, and R. S. Ruoff, Langmuir 20, 3011 (2004). 20. P. Makaram, S. Selvarasah, X. Xiong, C.-L. Chen, A. Busnaina, N. Khanduja, and M. R. Dokmeci, Nanotechnology, 18, 395204 (2007). 21. E. Gultepe, D. Nagesha, B. D. Frederic Casse, S. Selvarasah, A. Busnaina, and S. Sridhar, Nanotechnology 19, 455309 (2008). 22. M. Dimaki and P. Boggild, Nanotechnology 15, 1905
Electron. Mater. Lett. Vol. 9, No. 6 (2013)
766
T.-H. Kim et al.
(2004). 23. L. X. Benedict, S. G. Louie, and M. L. Cohen, Phys. Rev. B 52, 8541 (1995). 24. D. F. Chen, W. H. Li, H. Du, and M. Li, JNN 12 3035 (2012).
25. S. Selvarasah, A. Busnaina, and M. R. Dokmeci, IEEE Trans. Nanotech. 10, 13 (2011). 26. K.Y. Ang, K. Yao, Y. Chen, and S. L. Teo, JNN 9, 6523 (2009).
Electron. Mater. Lett. Vol. 9, No. 6 (2013)