Journal of Electronic Materials, Vol. 27, No. 7, 1998 826

Regular Issue Paper Ward and Hendricks

Symptoms of Stress-Induced Gain Degradation in Power MESFETs ALLAN WARD III and ROBERT W. HENDRICKS Materials Science and Engineering Department, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061

GaAs metal-semiconductor field effect transistors configured as microwave power amplifiers have been observed to degrade under normal device operations at high gate-to-drain fields. The nature of this degradation is an increase in the gate current, with a subsequent decrease in the gain. We present evidence that crystallographic defects in the active region are responsible for this “power slump” and that these defects originate during device operation due to the high strain fields which exist as the result of passivation layer processing. Strain data and x-ray topographic images support our assertion that passivation layer processing induces high strain in and around the gate-to-drain region of the device. Topographic images show that an increase in dislocation density occurs in the highly stressed regions after power slump. By varying deposition parameters, we can produce passivation films, which induce less stress in the active region, resulting in less dislocation generation and a less severe power slump. Key words: Dislocation, GaAs, metal-semiconductor field effect transistor (MESFET), residual stress

INTRODUCTION GaAs power metal-semiconductor field effect transistors (MESFETs) have been observed to degrade when biased beyond a critical gate-to-drain field. The nature of this degradation, called “power slump,” is a time dependent decrease in gain associated with an increase in the measured gate current.1 We have used the convenient units of µA/h to quantify power slump. This phenomenon is an industry-wide problem primarily because it limits the capability of certain GaAs microwave amplifier integrated circuits (ICs) to operate at high output power for extended periods of time. All devices studied can be made to exhibit power slump at a sufficiently high gate-to-drain field, and the effects are irreversible. The purpose of this investigation is to characterize power slump from a materials perspective, thereby giving impetus for the development of a model to predict power slump, and to provide engineering solutions that may reduce or eliminate the problem. Our model to predict power slump appears else(Received March 17, 1997; accepted February 10, 1998) 826

where.2 HYPOTHESIS The symptoms of power slump are: • The gain of the amplifier is irreversibly decreased, • All devices can be made to power slump if sufficiently electrically stressed, and • The gain decrease is associated with an increase in the measured gate current. The preceding observations suggest that the materials changes associated with power slump take place in the active region of the device near the gate. Proprietary electrical test data show a rather pronounced increase in the ideality factor, indicating that a significant number of generation/recombination centers are created during power slump. No change in the thermionic emission current was observed in these devices, implying that either an increase in the generation component of the gate current or surface leakage current may be responsible for power slump. An increasing number of generation centers is consistent with our assertion that a materials change is responsible for the decrease in gain. Theoretical

Symptoms of Stress-Induced Gain Degradation in Power MESFETs

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Fig. 4. Topograph of a device exhibiting a large value of power slump; residual stress = 131 MPa. Fig. 1. Linear relationship between residual stress and power slump.

creases, and between dislocation density and power slump. RESIDUAL STRESS EVALUATION

Fig. 2. Topograph of device exhibiting no power slump; residual stress = 4 MPa.

Fig. 3. Topograph of a device exhibiting a moderate value of power slump; residual stress = 27 MPa.

calculations2 show that the number of surface states required to account for the magnitude of the observed gate current increase is unreasonable for the materials used in these devices. Therefore, our attention turns to linear crystallographic defects in the vicinity of the gate—specifically, dislocation structures in the single crystal GaAs depletion region. If a change in the nature of the electronic structure of the active region is responsible for power slump, a sufficiently high shear stress must exist to provide the motivation for dislocations to glide or increase in length. We hypothesize that the change occurring in the electronic nature of the active region of the device is due to either changes in the kink density of a growing dislocation (possibly from a defect generation source), or due to the generation of anti-site defects by gliding dislocations. In either case, we predict a correlation between residual stress and dislocation density in-

To determine whether dislocation growth or motion is reasonable in these devices, it became necessary to determine the magnitude of the shear stresses in the active region of the device. For GaAs, the minimum shear stress necessary to move a dislocation is approximately 90 MPa at room temperature,3 although this value can be reduced by recombination enhanced dislocation glide.4 The resolved shear stresses were determined using an x-ray diffraction single-crystal stress measurement technique, developed by the authors,5 and computer simulation to determine stress distributions on the sub-micron scale.6 The power slump data were analyzed with respect to residual stress (Fig. 1). These data represent the superposition of macro and local residual shear stresses in the GaAs region, at a depth of 100 nm below the GaAs surface and 300 nm from the passivation film edge. The SiON passivated devices were found to contain shear stresses of 35 MPa or less, while SiN passivated devices were found to contain shear stresses of more than 35 MPa. The R2 value of this regression is 0.92, indicating that residual shear stress on the {111} planes correlates approximately linearly with power slump. This is consistent with our hypothesis that dislocation glide and/or growth is associated with the phenomenon. DISLOCATION IMAGING To verify that dislocation motion or growth is associated with power slump, dislocation structures in the FET region of the device were imaged directly. We used synchrotron Laue topographya to image dislocation structures on the (533) planes in fully processed devices. The depth of penetration for our images is determined by dynamical attenuation,7 and for the radiation wavelength used (λ = 1.1386Å), is approximately 9 nm. These images, therefore, represent the near-surface dislocation distribution. Figures 2 through 4 show images of dislocation structures in the FET region of different devices, aThis

work was performed at the Stanford Synchrotron Radiation Laboratory (SSRL).

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which were electrically biased, to identical levels. The dislocations are the diffuse white regions present throughout the FET region. (The geometrical white regions are due to strain fields and absorption associated with metallization structures.) In Fig. 2, all four FETs are fairly dislocation-free, with only the strain field from the gate finger metallization present. Figure 3 shows that the FET regions are becoming more clouded due to an increase in the local dislocation density. This is most apparent in the first and third FET from the top of the image, in which dislocations fill the entire FET region. (Also note that the gate finger metallization is better defined due to the increase in the magnitude of the local strain fields.) Finally, Fig. 4 shows that all of the FET regions are completely clouded by a relatively high dislocation density. Note that the strain fields from the gate finger metallization are obscured by the strain fields of the dislocations present. The topographs shown are typical of all 34 devices studied, with higher power slump levels corresponding to higher dislocation densities. It appears, at least semi-quantitatively, that a correlation exists between dislocation density and the magnitude of the power slump. DISCUSSION AND CONCLUSIONS Our materials investigation of power slump in GaAs MESFET microwave power integrated circuits has found a positive, linear correlation between residual shear stress in the active region of the device and power slump. Previous measurements produced electrical data that show that an increase in ideality factor occurs in devices which exhibit power slump. Finally, we have produced topographic evidence that a correlation exists between dislocation density and power slump. One could assert that the correlations between residual stress and power slump and between residual stress and dislocation density does not imply a cause and effect relationship between dislocation density increase and power slump, opening the possibility that residual stress directly causes power slump. This hypothesis has been previously studied by Ely,8 but no direct association was found. (A relationship between residual stress and changing threshold voltage due to piezoelectric effects was found, however. It should be noted that the biasing conditions of Ely’s study were well below the threshold requirements to

induce power slump.) These data support our model in which an increase in the number of generation centers in the depletion region of the device is responsible for the observed increase in gate current (as evidenced by the increase in ideality factor with power slump). Since the dislocation density under the gate increases with increasing power slump (as shown by topographic imaging), and since the magnitude of the power slump positively correlates to the degree of process-induced stress in the active region (as shown by residual stress measurements), it is reasonable to assert that process-induced stress causes multiplication and motion of dislocations into the depletion region where they act as the aforementioned generation centers. We have proposed elsewhere2 that these generation centers are either kinks on dislocations, or are anti-site defects generated by moving dislocations. In either case, these crystalline defects appear to be produced by the combined effects of residual shear stress and recombination enhanced dislocation glide in the active region of the device. ACKNOWLEDGMENTS The authors give special thanks to Dr. Arthur Bienenstock and Dr. Zofia Rek of the Stanford Synchrotron Radiation Laboratory (SSRL), and Dr. Andrew Peake, Professor Avraham Amith, and Mr. John Bell for their technical and financial assistance with this research. REFERENCES 1. Y.A. Tkachenko, et. al., 1994 U.S. Conf. on GaAs Manufacturing Technology, p. 35. 2. A. Ward, Ph.D. Dissertation, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061, June 1996. Internet address on the World Wide Web: http:// scholar.lib.vt.edu/theses/public/etd-394172159651721/etdtitle.html. 3. P.B. Hirsch, P.B., Dislocations and Properties of Real Materials, (London: The Institute of Metals, 1985), p. 333. 4. K. Maeda, et. al, Mater. Res. Soc. Symp. Proc., 184, (Pittsburgh, PA: Mater. Res. Soc., 1990), p. 69. 5. A. Ward and R.W. Hendricks, Advances in X-ray Analysis, 39, 1995, p. 289. 6. A. Ward and R.W. Hendricks, Proc. Fifth Intl. Conf. Residual Stresses, Linköping, Sweden, June 16–18, 1997, (in press). 7. B.E. Warren, X-ray Diffraction, (New York: Dover Publications, 1990), p. 315. 8. K.J. Ely, Ph.D. Dissertation, Virginia Polytechnic Institute and State University, Blacksburg, VA, June 1993.