Analog Integrated Circuits and Signal Processing, 28, 73–81, 2001 C 2001 Kluwer Academic Publishers. Manufactured in The Netherlands. 

Dynamic Current Requirements in Single-Ended Log-Domain Filters ROBERT M. FOX, H. J. KO AND W. R. EISENSTADT University of Florida, Department of Electrical and Computer Engineering, 538 Engineering Building/Box 116130 Gainesville, FL 32611-6130 Tel: (352) 392-2543 Fax: (352) 392-8381 E-mail: [email protected]

Received June 27, 2000; Revised August 15, 2000; Accepted December 1, 2000

Abstract. Single-ended log-domain filters must operate Class A: the amplitude of any symmetric signal must be less than the bias current. Even so, peak internal dynamic current requirements can be much greater than the bias currents. Worst-case peak current demands in a second-order log-domain filter are related to modulation index by simple expressions that allow transistor geometries to be optimized for specified signal levels. Several circuit topologies are considered, and some circuit topologies are shown to be better able to supply larger internal currents than others. Key Words: filters, log-domain, continuous-time

I.

Introduction

A variety of methods have been presented for designing log-domain filters to implement desired continuoustime filter transfer functions [1–5]. The basic building block of Gm-C filters, the linearized transconductor, is replaced in log-domain designs by translinear circuit blocks known as E cells [1,4]. If the blocks display ideal translinear behavior, all nonlinearities cancel, and the overall transfer function is linear. Numerous transistor-level topologies have been proposed to implement E-cells [1–13], all of which ideally give the same results. In practice, of course, ideality of the cells degrades as current magnitudes increase, causing distortion. Few design-oriented approaches have been presented for choosing device geometries to meet specified criteria, and little has been written about how to choose among E-cell topologies. As we shall see, even in log-domain filter circuits operated Class A (signal amplitudes less than the bias current), dynamic current requirements can be much greater than the bias currents when the modulation index approaches unity. Simple estimates of peak current required for a given signal magnitude can be used to aid in selecting transistor geometries and choosing among E-cell topologies.

II.

E-Cell-Based Log-Domain Filter Design

Fig. 1 is a diagram of a log-domain second-order filter [5]. The key building blocks are exponentiating or E cells. An E cell has two high-impedance voltage inputs V+ and V− and a reference current input Ib . The non-inverting or E+ cell provides an output current Iout P = Ib exp[(V+ − V− )/Vt ], where Vt is the thermal voltage. The inverting or E− cell provides an inverted current Iout N = Ib exp[(V− − V+ )/Vt ]. Fig. 2 shows the schematics of simple circuits that can be used to implement E cells. All log-domain filters operate in current mode; the filter’s input and output currents include superposed bias and signal components. The bias currents and voltages in the filter are arranged so that for zero signal the capacitor voltages VoB and VoL equal zero. These capacitor voltages are converted to the bandpass and lowpass output currents IoB = I0 +i oB + and IoL = I0 + i oL using E+ 3 and E4 . The transfer functions can be shown to be [5] HL (s) =

IoL (s) 1 = IIN (s) (s/ω0 )2 + (1/Q)(s/ω0 ) + 1

(1)

H B (s) =

IoB (s) (s/ω0 ) = IIN (s) (s/ω0 )2 + (1/Q)(s/ω0 ) + 1

(2)

where ω0 = I0 /(C Vt ) is the cutoff frequency and IoL (s)

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Fig. 1. Single-ended log-domain 2nd-order lowpass/bandpass filter.

Fig. 2. Typical circuits implementing inverting (E+ ) and non-inverting (E− ) log-domain cells [4].

and IoB (s) are the Laplace transforms of i oL and i oB . Note that I0 can be adjusted to electronically tune the filter’s center frequency. Since these transfer functions are linear, the output currents corresponding to any input can be calculated using (1) and (2). However, internal currents in the filter that were eliminated algebraically in deriving (1) and (2) are quite nonlinear. In the next section, we consider how to estimate their peak values.

III.

Dynamic Currents

The current in C2 is the difference of two E-cell currents IC2 = I2+ − I2− = I0

IoB (t) I0 − I0 . IoL (t) IoL (t)

(3)

Obviously, if IoL (t) approaches zero while IoB (t) is nonzero, I2+ and I2− both increase without bound. Consider the case of a sinusoidal input at frequency ω

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Fig. 3. Simulated currents for second-order filter as in Fig. 1. The circuit was driven with a sinusoid with input modulation index of 0.9, and a frequency of 10 kHz, much less than the filter cutoff frequency, 10 MHz.

such that IoL (t) = I0 [1 + m sin(ωt)],

(4)

where m is the output modulation index. From (2), IoB (t) = I0 [1 + m(ω/ω0 ) cos(ωt)].

(5)

For low frequencies (ω  ω0 ), the bandpass output signal i oB (t) is attenuated by the filter and IoB (t) is approximately constant at I0 . The peak values of I2+ and I2− both approximately equal Imax = I0 /(1 − m).

(6)

For m = 0.75, Imax = 4I0 , and for m = 0.95, Imax rises to 20I0 . To operate without distortion, the cells must be able to handle currents this large while conforming to ideal translinear behavior. At higher frequencies the signal swing of IoL and the resulting peak currents are less than Imax .

The second-order filter of Fig. 1 was simulated using E cells as in Fig. 2, with ideal models for the transistors. As in all of the simulations to follow, the tuning current I0 was set to 100 µA, and C1 and C2 were set to 62.8 pF, to give a cutoff frequency of 10 MHz and filter Q was set to 0.707. Fig. 3 shows simulated output currents and the currents driving C2 when the input was a sinusoid with amplitude 90 µA and frequency of 10 kHz. The lowpass output modulation index is m = 0.9, and the maximum E-cell current is 10I0 , as predicted by (6). Analysis of the peak currents driving C1 is somewhat more complicated. Analogous to (3), we have IC1 = I1+ − I1− − I0 /Q, where I1+

    1 I0 = I0 1 + + i in Q IoB

(7)

(8)

and I1− = I0

IoL (t) . IoB (t)

(9)

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Fig. 4. Simulation results with the filter driven with a sinusoid at the cutoff frequency so that the output modulation index is 0.9. In this case the largest currents flow in the E cells driving capacitor C1 .

Peak values of I1+ and I1− occur for ω close to the center frequency ω0 , where the signal swing of IoB is greatest. The maximum of the current I1+ is approximately

I1+

 = I0

1 m 1+ − Q Q

 (1 − m).

(10)

Fig. 4 shows simulation results analogous to those in Fig. 3, except that the input frequency is set to the cutoff/center frequency. Since the filter gain at this frequency is Q = 0.707, the input was set to 0.9/Q = 1.27I0 to give m = 0.9 for both outputs. As predicted by (10), the peak current is about 12I0 . For I1− the peak value depends moderately on Q. In our case of Q = 0.707 the peak value is roughly 1.1Imax and for higher Q it approaches Imax as the minimum of i oB nears the zero-crossing of i oL . For typical filter designs, all of these currents are fairly close to Imax .

IV.

Implications for E-Cell Selection and Design

To design a filter to operate linearly up to some maximum signal level, the E cells must be designed to supply the peak currents given by these relationships under worst-case variations of process, temperature and supply voltage, and for all expected values of the tuning current I0 . As peak dynamic currents increase, the current densities in the BJTs increase, leading to gradually increasing nonlinearity and distortion. Also, MOSFETs may enter triode operation or BJTs may saturate, limiting further increases of the dynamic currrents and leading to rapid increases in distortion. To illustrate these effects, another filter as in Fig. 1 was designed and simulated, this time using the E-cell circuits shown in Fig. 5 [6]. Ideal models were used, except for the PMOS current mirrors, which were designed to go into triode operation for I D > 338 µA, corresponding to a lowpass modulation index just over 0.7. As shown in Fig. 6, for lowpass output modulation index m = 0.7, the peak currents driving C2

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Fig. 5. Another set of E-cell circuits [6].

Fig. 6. Currents in second-order filter using E cells as in Fig. 5, with PMOS current-mirror designed to handle only 338 µA before entering triode-region operation. Lowpass currents become nonlinear for m above about 0.7. The input frequency in the simulations was well below the filter cutoff.

are as predicted by the preceding analysis: I2+peak = 100 µA/(1 − 0.7) = 333 µA. However, when the input is increased so that linear analysis would predict m = 0.8, I2+ is limited to well below the 500 µA required for

linear operation. Fig. 7 shows that total harmonic distortion (THD) in these idealized simulations is negligible for m up to 0.7, but increases rapidly for m > 0.7.

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Fig. 7. Distortion in second-order filter using E cells as in Fig. 5, reflecting increasing distortion of the lowpass output signal as PMOS FET M2 in Fig. 5 is over-driven.

Inability to supply these large dynamic currents could limit the applicability of some E-cell circuits. Suppose that the E− cells in the filter are implemented with the cells shown in Fig. 8 [7,8], along with the E+ cells from Fig. 2. Assuming the transistors operate ideally, the collector currents in Fig. 8 are related by i outN = i c3 = i c6

i c4 exp[(V− − V+ )/Vt ], i c5

(11)

which, since i c4 = i c5 and i c6 = I0 , gives i outN = I0 exp[(V− − V+ )/Vt ].

(12)

independent of Itail . However, (12) is only valid as long as i c4 = i c5 = Itail − i outN is positive. As we have seen, the peak values required for i outN can be very large. The standby value of the Itail must be greater than the maximum currents predicted in the previous section to avoid clipping of the E-cell currents. This would greatly increase the standby current requirements of filters using this E− cell circuit. To illustrate this, another set of SPICE simulations were done using the E− cells from Fig. 8 and the E+ cells from Fig. 2, with Itail = 5I0 = 500 µA.

Fig. 8. E− -cell circuit from [7]. Output current in this cell is limited by Itail .

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Fig. 9. Simulation results analogous to those in Fig. 3, except that the E− -cells have been replaced with those from Fig. 8, with Itail set to 5I0 = 500 µA. The limited currents cause clipping of both the dynamic currents and the output currents.

Fig. 10. Simulation results of a filter using the E− -cells from Fig. 8, driven with a sinusoid at the 10 MHz cutoff frequency with an amplitude that would give output modulation index of 0.9 in a linear filter. As in Fig. 9, the E− -cell current limitation causes distortion, but at this frequency the output distortion is reduced by the frequency response of the filter.

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Fig. 11. The modulation index at which low-frequency 1% THD occurs is consistent with (13) when E-cell currents are limited by Itail .

As shown in Figs. 9 and 10, the limited E-cell current causes significant distortion of the output signals. Fig. 11 shows that the onset of distortion in this circuit can be predicted fairly accurately using m max = 1 − V.

I0 . Itail

(13)

Conclusion

In the analysis of log-domain filters to determine input– output transfer functions, the internal currents supplied by the E cells are usually eliminated algebraically. These currents can be quite large and can be dominant in controlling dynamic range. Practical circuit designs must accommodate large swings of these internal currents. This paper provides design-oriented relations for picking transistor geometries to meet such specifications. The relations were derived for a specific filter topology, but the methods can easily be generalized for other single-ended filter topologies. Acknowledgment This work was supported by NSF Grant MIP-9706558 and by Intersil Corp.

References 1. Frey, D. R., “Exponential state space filters: A generic current mode design strategy.” IEEE Trans. Circuits Syst. I, 43, pp. 34– 42, January 1996. 2. Frey, D. R., “Log domain filtering using gyrators.” Electron. Lett. 32, pp. 26–28, January 1996. 3. Perry, D. and Roberts, G. W., “Log-domain filters based on LC ladder synthesis,” in Proc. 1995 IEEE Int. Symp. Circuits Syst., Seattle, WA, pp. 311–314, April 29–May 3, 1995. 4. Fox, R. M., “Design-oriented analysis of log-domain circuits.” IEEE Trans. Circuits Syst. II, 45, pp. 918–921, July 1998. 5. Fox, R. M., Naharajan, M. and Harris, J., “Practical design of single-ended log-domain filters,” in Proc. 1997 IEEE Int. Symp. Circuits Syst. Hong Kong, pp. 341–344, 1997. 6. Punzenberger, M. and Enz, C., “A new 1.2 V BiCMOS logdomain integrator for companding current mode filters,” in Proc. 1996 IEEE Int. Symp. Circuits Syst., Atlanta, GA, pp. 125–128, May 1996. 7. Drakakis, E. M., Payne, A. J. and Toumazou, C., “Log-domain filters, translinear circuits and the Bernoulli cell,” in Proc. 1997 IEEE Int. Symp. Circuits Syst., Hong Kong, pp. 501–504, 1997. 8. Wu, J. and El-Masry, E. I., “New fully balanced log-domain integrators,” in Proc. 1998 IEEE Int. Symp. Circuits Syst., TAA 9-2, Monterey, CA, May 31–June 3, 1998. 9. Toumazou, C., Ngarmnil, J. and Lande, T. S., “Micropower log-domain filter for electronic cochlea.” Electronics Lett. 30, pp. 1839–1841, 1994.

Dynamic Current Requirements 10. Fried, R., Python, D. and Enz, C., “Compact log-domain current-mode integrator with high transconductance-to-bias current ratio.” Electronics Lett. 32, pp. 952–953, 1996. 11. Yang, F., Enz, C. and van Ruymbeke, G., “Design of lowpower and low-voltage log-domain filters,” in Proc. 1996 IEEE Int. Symp. Circuits Syst., Atlanta, GA, pp. 117–120, May 1996. 12. Edwards, R. T. and Cauwenberghs, G., “A second-order logdomain bandpass filter for audio frequency applications,” in Proc. 1998 IEEE Int. Symp. Circuits Syst. WPA 12-3, Monterey, CA, May 31–June 3, 1998. 13. El-Gamal, M. and Roberts, G. W., “Very high-frequency logdomain bandpass filters.” IEEE Trans. Circuits Syst. II, 45, pp. 1188–1198, 1998.

Robert M. Fox received the B.S. degree in Physics from the University of Notre Dame in 1972, and M.S. and Ph.D. degrees in Electrical Engineering from Auburn University in 1981 and 1986, respectively. Since 1986 he has been on the Electrical and Computer Engineering faculty at the University of Florida, where he is an Associate Professor. Dr. Fox’s research emphasizes circuit design and modeling for advanced IC technologies. He has worked on a variety of topics including analog circuit design, cryogenic electronics, circuit design with SOI, radiation response of semiconductors, noise modeling, and modeling of transistor self-heating. Currently his research intersts center on design-oriented analysis of analog integrated circuits, including low-voltage circuit techniques, design of log-domain circuits, analog test strategies and transistor modeling.

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H. J. Ko was born in Seoul, Korea, 1970. he received B.S. degree in Electronic Engineering in 1995 from Ajou University, Korea and M.S. degree in Electrical and Computer Engineering in 1998 from University of Florida, Gainesville, FL, where he is currently working toward the Ph.D. degree. Since 1998 he has been working as a research assistant at UF. His current research interests are design and analysis of CMOS continuous-time filters and log-domain filters.

W. R. Eisenstadt received the B.S., M.S., and Ph.D. degrees in electrical engineering from Stanford University, Stanford, CA, in 1979, 1981, and 1986, respectively. In 1984, he joined the faculty of the University of Florida, Gainesville, FL, where he is now an Associate Professor. His research concerns mixed-signal embedded IC testing and high-frequency characterization of integrated circuit devices, packages, and interconnect. In addition, he is interested in large-signal microwave circuit and power amplifier design. He has over 20 years experience in IC design. Dr. Eisenstadt received the NSF Presidential Young Investigator Award in 1985. He has over 50 refereed conference and journal publications.