FREQUENCY

COMPARATOR

WITH

A DELAY LINE

(UDC 621.374.5: 621.317.361) V. A.

Egorov

Translated from I z m e r i t e l ' n a y a Tekhnika, No. 10, pp. 58-59, October, 1965 In a u t o m a t i c tuning and calibration of frequencies it becomes necessary to determine a u t o m a t i c a l l y the sign of the frequency difference A~ = fl--fs of two signals U1 = U cos 2~1t and U s = U (f2t) for very small values of that difference. This problem is often solved by z e r o - b e a t discriminators which u t i l i z e the sudden change in the difference frequency phase when Af passes through zero. However, for values of Af smaller than 50 Hz the above devices have a "dead zone" due to a reduction in the a d m i t t a n c e of the c a p a c i t i v e circuit at frequencies approaching zero. The sign of the frequency difference /xaewhich approaches zero can be determined by analyzing changes with respect to the sine wave UtOel) m a x i m u m in the delay of pulses formed from frequency ~s. On the basis of this principle a functional circuit of a frequency comparator with a delay line has been designed. The frequency comparator (Fig. 1) consists of d e l a y line DL, two coincidence circuits AND 1 and AND s, two open gates GO 1 and GO 2 (anticoincidence circuits of pulses with respect to a level), two closed gates GC 1 and GC 2 (coincidence circuits of pulses with respect to a level), and of a trigger Tr with a relay in its anode circuit, whose contacts are closed for aeI < ae2 and open for ael > fs. Signal U 1 at the output of the first oscillator of frequency jeI is fed to the inputs of coincidence circuits AND 1 and AND s. The second input of AND 1 is fed with the second oscillator pulses U s of frequency ~2. The second input of circuit AND 2 is fed with pulses U~ through line DL where they are delayed by t i m e ra. The coincidence circuit produces pulses when the input pulses coincide in t i m e with the positive half-wave of voltage U I. In the absence of coincidence-circuit pulses, gates GC 1 and GC s are normally closed, whereas gates GO 1 and GO s are normally open. The pulses of circuit AND 1 appear first, when f l < aes (see Fig. 2). They are fed through the normally open gate GO1 to storage circuits SI-) and S~+) (see Fig. 2f). Storage S~-) converts the pulses of circuit AND 1 into a negative voltage (see circuit 2g) which closes the previously open gate GO s. Storage St+) converts the same pulses into a positive voltage (see Fig. 2h) which opens the formerly closed gate GC 2. Pulses of the second coincidence circuit AND s (see Fig. 2e) which are produced after gate G C s is opened are fed through the gate to trigger Tr and trip it into its right-hand stable position. The voltages of storages St +) and S~-) return to normal after a pulse train of coincidence circuit AND~ has passed, gate GO 2 opens and gate GC 2 closes. The pulses of circuit AND 2 whichhave passed through gate GO s close gate GO 1 and open gate GC 1, thus opening the path for the pulses of circuit AND 1 to the trigger. However, the trigger is not tripped, since the transmission of the AND I pulses has already stopped. Thus, trigger Tr is tripped to its right-hand position when fl < fz, and in a similar manner it is tripped to its left-hand position when :fl > fs. The right-hand anode circuit of trigger Tr carries a relay whose contacts close or open depending on the condition of the trigger, i. e., depending on the sign of Af. The relay contacts can be used for controlling the a u t o m a t i c tuning of one generator to the frequency of the other, or for operating an a p propriate indicator. Fig. 1

The frequency comparator comprises four tubes type 6N16B. Each coincidence circuit uses one half of double triode Tl(Fig. 3).

The signaIs of the compared generators are fed in the form of negative pulses to the grids of T 1. A positive p u r e

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appears across resistor R2 only for a simultaneous raising of potentials on cathodes D 1 and Dz. This occurs when the positive half-wave of U 1 across resistor Rt coincides in time with positive pulses U2 produced across the characteristic impedance of the delay line. In a similar manner the signal which appears across resistor Ra corresponds to the coincidence of pulses U 1 with pulses U~ which are produced across R4 (delay-line load) and are delayed with respect to pulses Uz by time r 3 = 0.5 gsec. The coincidence pulses are fed from R2 and Ra to the grids of the open gates T 2 and the closed gates T 3. In the absence of pulses the potentials of grids T 2 are set by voltage dividers R7, I~ and Rs; Rs to - 10 V. The positive pulses of the coincidence circuits with an plified in T 2 and converted by storages S~"), S~-) and S~+), S~+) into negative and amplitude up to + !0 The V are ampositive voltages. storages consist of diodes D3 . . . D10 connected in a voltage double r circuit. When pulses of circuit AND i appear on the left-hand grid of T2, the potential of anode D3 is lowered to 35 V, and the potential of cathode Ds is raised to a value of - 35 to - 10 V. Thus, the normally open gate of the righthand half of T 2 is closed, and the normally closed gate of the right-hand half of T a is opened for the pulses of coincidence circuit AND 2. The pulses of circuit AND2 are then amplified in the right-hand half of triode T a and transmitted from its anode through capacitor C to trigger T 4 which they trip. The operation of the trigger into its righthand position lowers the anode of diode Dll, thus blocking it and preventing the transmission of subsequent pulses from the right-hand anode of T a to the trigger. The current in the right-hand half of T 4 operates the relay and closes its contacts, which indicates that ~l < ~z. After the transmission of the pulse trains of circuits AND t and AND 2 the right-hand half of T4 remains conducting, whereas the left-hand half is blocked. In a similar manner when ft > 3c2, the right-hand half of T~ is blocked, the left-hand half of T a becomes conducting, and the pulses of circuit AND I are amplified in the left-hand half of T a and operate the trigger into a position in which the left-hand half of T 4 remains conducting. The relay contacts then remain open, which corresponds to condition ft > f2. The frequency comparator made according to this circuit has been used successfully for comparing frequencies of crystal-controlled oscillators operating at 300 kHz. It is significant that when the frequency difference was reduced to hundredths of one hertz, the operation of the circuit did not deteriorate. Since the sign of the difference frequency is determined once per its period, it follows that the frequency with which the comparator provides i n formation on the sign of the frequency difference is Ay and, hence, the m a x i m u m precision of comparison (the m i n imum frequency difference Afmin detected by the instrument) is determined by the tolerated duration of the a n a l y sis and the stability of the compared frequencies. The instrument cannot evaluate precisely the sign of the difference if frequency Fsg of the sign variations is greater than ZXf. The instants at which the difference frequency sign changes can be evaluated with greater precision when the inequality Af >> Fsg is amplified. The frequency comparator is intended for automatically tracking and correcting crystal-controlled oscillators by comparing them with frequency standards. It can also be used for setting oscillators to a condition of automatic phase trimming or to provide direct automatic phase trimming of oscillators. The controlling voltage then consists of the storage voltage which is proportional to the phase difference of the compared signals.

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