Note that in expression (2) x/i is the length of the subtangent, the projection of the tangent on the time axis [3] (OC and OD in Fig. I). Since the segments OC and OD are parts of the sweep axis, they represent certain time intervals Att and At2. Considering this, expression (2) becomes
~(~tt+~t~) tg ~=
l_~2~t~t~
(3)
,
where &tt and At2 have the same signs if the points C and D lie on the same side of the ]point t = 0. In Fig. i, At: and At= have different signs. The time intervals At~ and At2 can be found with the aid of a double-beam storage oscilloscope applying the measured and a reference voltage to its two inputs. One leg of a small compass is placed vertically so that it crosses the sweep axis (zero line) at a point taken as the zero time. The pivot of the compass coincides with the trace of the luminous spot and its second leg is directed along the tangent to this trace. The distance between the points the compass legs cross the sweep line then gives the time intervals At~ and At2 taking into account the sweep time scale. Expression (3) is then used to calculate the required phase shift. The proposed oscilloscope with same oscillations shift angles were 77.4 ~ by the zero
method of phase shift measurement has been verified with the aid of a C8-2 0.002-Hz oscillations from a G6-26 oscillator applied to one input and the passed through a phase-shifting network, to the other. The measured phase 44.4, 47.3, 71.4, and 70 ~ by the proposed method, and 45, 43.2, 77.4, and crossing method.
The proposed method provides a coarse but fast estimation of phase differences between ulf oscillations. LITERATURE CITED 1. 12. 13.
I. Checkh, Oscilloscopes in Measuring Engineering [in Russian], Energiya, Moscow-Leningrad (1965), pp. 405,406. R. E. Ershov, Inventor's Certificate No. 1219979, Byull. Izobret., No. ii (1986). I. N. Bronshtein and K. A. Semendyaev, Mathematical Handbook [in Russian], Nauka, Moscow (1964), pp. 190, 237, 238.
]~JLTIPHASE VOLTAGE SOURCE M. I. Efimov, A. I. Kalenik, and S. D. Popovichenko
UDC 621.317.39:681.335.2/.8
Selsyn devices operating in a rotating magnetic field mode are now frequently used as phase shifters (PS) in angle-to-phase-to-code converters. The power supplies of such phase shifters usually generate a set of phase-split voltages. The requirement of high phase-conversion accuracy imposes strict demands on the symmetry and stability of voltages feeding PSs since the accuracy of devices operating in rotating fields depends on relative phase and amplitude asymmetry and stability of supply voltage in the same measure as on the accuracy of the PS proper. In practice, the excitation windings of PSs are most frequently fed with rectangular voltage. This is due to the fact that accurate and stable supply voltage phase shifts are easier to generate with rectangular signals [2]. However, in such a case converter accuracy can be improved only by reducing nonlinear distortion of the PS output voltage which has a sinusoidai stepwise form and for this reason requires high-Q filters. The phase stability of such filters also becomes an important factor in PS accuracy [3]. Here we describe a circuit which combines the advantages of analog and digital generators of phase split signals: sinusoidal signal generation (analog circuits) and high-phase stability (digital circuits). The circuit produces a set of symmetrical phase-split quasisinusoidal voltages with low nonlinear distortion at fixed frequencies with stable phase shifts and amplitudes. Translated from Izmeritel'naya Tekhnika, No. 8, pp. 55-56, August, 1986. 0543-1972/86/2908-0779512.50
9 1987 Plenum Publishing Corporation
779
~O HX fll D2
O6
v!
-
,
'i[
_
_b,
v
!
Icq D,s
L I l l L
I ] ~L~_
Phase 2
]
8
I
Phase
;;Sv :LE
i +.~_ 3" 10,2q'V +
Fig. 1 The circuit is actually a function generator in which the contents of a read-only memory (ROM) is successively applied to the input of an digital-to-analog converter (DAC). The ROM is preprogrammed with ten-bit binary codes representing the values of sin ~ at 240 discrete values of ~ (every 1.5~ The quasisinusoidal DAC output voltage can assume 240 different values per period with an accuracy corresponding to Uref/1024, where Ure f is a reference voltage. The output signal frequency of the circuit fout = frd/240, where frd is the readout frequency of the ROM contents. The number of discrete points has been selected to ensure an output signal with the lowest nonlinear distortion factor compatible with the selected component base. The circuit diagram of the generator is shown in Fig. i. The master generator DI (KI55LN1) is crystal stabilized at 7.2 MHz. The fixed-frequency signal generator includes D2, D7 (KI551E2), D6, DI0 (KI551E4), and D9 (KI551E5). One of the signals is selected by means of the corm~utator DII (KI55KP5). The address counter DI3, DI4 (KI551E5) generates a periodically successively increasing eight-bit binary code applied to the address inputs of the ROM consisting of D3-D5 (K556RT4) organized as 256 four-bit words. To increase the number of bits of the output code to ten, each channel is composed of three ROMs connected in parallel. The DAC consists of DI2 (K572PAIA) and DI5 (KI4OUD8A) integrated circuits. DI7 (KI57UDI) connected as a voltage follower operates as a power amplifier. DI6 (KI55LA2) acts as a decoder
780
which resets the address counter every 240th clock pulse. The capacitor C* (47 pF) smooths the sinusoidal step DAC output signal. D8 (KI42ENIA) operates as a reference voltage source adjustable by means of a trimmer potentiometer. The phase-split voltage generators of all three channels are identical. The channel phase shift is set when the ROM are programmed. The PS excitation windings are fed through decoupling capacitors. The device is very useful providing two- or three-phase symmetric quasisinusoidal voltages for feeding various types of phase shifters (synchro voltage transformers, selsyn generators) selected by replacing ROMs mounted in type RS-16-1 sockets, and allowing selection of the motion-to-phase shift conversion factor by specifying different supply voltage frequencies out of a set of fixed frequencies. The circuit generates a phase-split set of voltages at frequencies equal to i00, 200, 300, 500, 600, 750, !000, and 1500 Hz. The output voltage can be varied from 3 to 10V at a rated load current of 0.02 A. The nonlinear distortion factor of all output voltages was 0.12% as measured with an $6-5 meter. The circuit requires 5, +15, and --15 V dc voltages at 750, 35, and 25 mA, respectively. The circuit is assembled on a 155 • 258 printed-circuit
board with a type GRPMI plug.
The described circuit has been used in an angular motion-to-code converter for feeding the PS excitation windings making it possible to use a low-pass filter for reducing the output voltage nonlinear distortions. The filter was a second-order Butterworth filter with a 3 kHz cutoff frequency. The nonlinear distortion factor of the PS (BS-155A selsyn) output voltage was 0.08% as measured with an $6-8 meter. One and one-half years of operation with BS-155A, VT-5, and 2.5BVT-2 phase splitters proved that the circuit is reliable and has stable electrical properties. LITERATURE CITED 1. 2.
.
A. V. A. E. grad A. P.
Kosinskii, Izmer. Tekh., No. 7, 31 (1978). Zverev et al., Angular Motion-to-Code Converters (1974). Zharkov et al., Izmer. Tekh., No. 7, 27 (1978).
[in Russian], Energiya, Lenin-
RECYCLING CONVERTER OF SINGLE TIME INTERVALS INTO A CODE G. N. Abramov
UDC 681.325.3
The design of converters of single time intervals into codes that are highly accurate and at the same time simple in implementation is quite important. Certain prospects in trend are provided by the method of successive coincidences [i, 2]. Unfortunately, converters based on this principle are rather slow. The method of increasing the speed of recycling time interval-to-code converters by a factor m proposed in [3] is based on parallel conversion of the time interval in each cycle. This is achieved by providing a parallel set of m reference time intervals with durations At n = nat, where n is the serial number and at the same time the weight of each reference time interval, n = i, 2, 3, ..., m; and At is the conversion quantization step which depends on the desired conversion accuracy. The conversion step is divided into several cycles. In the first cycle the time interval to be converted tx is compared with the set of At n. The result of comparison N, is stored, and the time interval of duration Atx, = t x -- mat is used in the next (second) cycle in which it is once again compared with At n. The result of comparison N2 is stored, and time interval of duration Atx2 = t x -- 2mAt is used in the third conversion cycle. This process is continued until Atxi > ~t n. The converted time interval is given by tx = (N, + N2 + .** + Np)At, where N,, N2, ... Np are the results of comparison in the Translated
from Izmeritel'naya Tekhnika, No. 8, pp. 56-57, August, 1986.
0543-1972/86/2908-0781512.50
9 1987 Plenum Publishing Corporation
781
