J Electron Test (2012) 28:3–5 DOI 10.1007/s10836-012-5282-7
New Editors, 2012
# Springer Science+Business Media, LLC 2012
1993, all in Electrical Engineering from Ecole Polytechnique de Montreal and the B.Sc. degree in Electronics Engineering in 1988 from Tehran Polytechnic.
Karim Arabi is Vice President, Engineering at Qualcomm where he is responsible for leading DFT, EDA and Low Power Design of SoC devices across the company. Previously, he was professor of Electrical Engineering at ETS in Montreal and held key technical leadership positions at PMC Sierra and Cirrus Logic. Dr. Arabi was a founder of Opmaxx, Inc., an innovative startup in analog design and test automation, acquired by Credence. Dr. Arabi's main research interest includes analog and mixed-signal design, DFT, BIST, low power design, design methodology development and electronic design automation. He has published more than 100 papers and he holds several key patents pertaining to the design and manufacturing of SoC devices. Dr. has Arabi served on program committees and organizing committees of several international conferences and workshops. He was the Guest Editor of the Journal of Electronic Testing: Theory and Applications (JETTA) for the February 2010 Special Issue on Analog, Mixed-Signal and RF Testing. He is currently on the program committees of International Test Conference and Asian Test Symposium and on the organizing committee of VLSI Test Symposium. Karim received the Ph.D. degree in 1996 and the M.Sc. degree in
Said Hamdioui received the MSEE and PhD degrees (both with honors) from the Delft University of Technology (TUDelft), Delft, The Netherlands. He is currently coleading dependable-nano computing research activities within the Computer Engineering Laboratory of TUDelft. Prior to joining TUDelft, Hamdioui spent more than 6 years in industry; he worked for Microprocessor Products Group at Intel Corporation (in Santa Clara and Folsom, California), for IP and Yield Group at Philips Semiconductors R&D (Crolles, France) and for DSP design group at Philips/NXP Semiconductors (Nijmegen, The Netherlands). His research interests include Memory Test, VLSI Test in general (Design-for-Testability, Built-In-Self-Test, 3D stacked IC test, Defect Oriented Test, etc), Hardware Security, Reliability, Dependability, etc. Hamdioui published one book and co-authored over 100 conference and journal papers. He has consulted for many companies (such as Intel, ST Microelectronics, Altera, Atmel, Renesas, and DS2) in the area of memory testing. He has collaborated with many industry/research partners in the field
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of VLSI Test, Reliability and hardware Security (examples are IMEC, NXP, Intrinsic ID, DS2, ST Microelectronics, etc.) He is strongly involved in the international test technology community as a member of organizing committees or a member of the technical program committees of the leading conferences, as reviewer for major journals, etc. He delivered dozens of keynote speeches, distinguished lectures, and invited presentations and tutorial at major international forums/conferences and at leading semiconductor companies. Hamdioui is a Senior Member of the IEEE; he serves on the Editorial Board of ISRN (the International Scholarly Research Network) Electronics. Hamdioui is the recipient of European Design Automation Association (EDAA) Outstanding Dissertation Award 2001 (for his work on memory test techniques that have a widespread proliferation in the chip design industry), IEEE Nano and Nano Korea award at IEEE NANO 2010 - Joint Symposium with Nano Korea 2010, Best paper Award at International conference on Design and Test of Integrated Systems in the nano-era DTIS 2011, and Intel informal Award for his efficient test methods for embedded caches in Intel microprocessors. In addition, he is a leading member of Cadence Academic Network on Dependability and Design-forTestability, and he was nominated for The Young Academy (DJA) of the Royal Netherlands Academy of Arts and Sciences (KNAW) in 2009. He is the winner of IEEE Nano and Nano Korea award at IEEE NANO 2010 - Joint Symposium with Nano Korea 2010. In addition, he is appointed as a leading member of Cadence Academic Network on Dependability and Design-for-Testability, and he was nominated for The Young Academy (DJA) of the Royal Netherlands Academy of Arts and Sciences (KNAW) in 2009.
Prabhat Mishra is an Associate Professor in the Department of Computer and Information Science and Engineering at the University of Florida where he leads the CISE Embedded Systems Group. His research interests include design automation of embedded systems, hardware/software verification, and low-power reconfigurable architectures. He received his B.E. from Jadavpur University, Kolkata, India in 1994, M.Tech.
J Electron Test (2012) 28:3–5
from the Indian Institute of Technology, Kharagpur in 1996, and Ph.D. from the University of California, Irvine in 2004, all in Computer Science. Prior to joining University of Florida, he spent several years in various semiconductor and design automation companies including Intel, Freescale, Synopsys and Texas Instruments. He has published three books, nine book chapters and more than 80 research articles in premier journals and conferences. His research has been recognized by several awards including the NSF CAREER Award from the National Science Foundation, two best paper awards (VLSI Design 2011 and CODES+ISSS 2003), five best paper award nominations, and 2004 EDAA Outstanding Dissertation Award from the European Design Automation Association. Prof. Mishra currently serves as an Associate Editor of IEEE Design & Test of Computers, Guest Editor of IEEE Transactions on Computers, the Information Director of ACM Transactions on Design Automation of Electronic Systems, and as a program/organizing committee member of several ACM and IEEE conferences including ICCAD, DATE, ASPDAC, CODES+ISSS, and VLSI Design. He was the Guest Editor of the Journal of Electronic Testing: Theory and Applications (JETTA) for the April 2010 Special Issue on High Level Design, Validation and Test. He is a senior member of both ACM and IEEE.
Haralampos-G. Stratigopoulos received the Diploma in electrical and computer engineering from the National Technical University of Athens, Greece, in 2001 and the Ph.D. in electrical engineering from Yale University, USA, in 2006. He is currently a Researcher with the French National Center for Scientific Research (CNRS) at TIMA Laboratory, Grenoble, France. His research interests are in the areas of mixed-signal/ RF design and test, machine learning, statistical learning, and neuromorphic solid-state circuits. He has co-authored more than 40 papers in these areas and a book chapter. He served as the Program Chair of the 2010 IEEE International Workshop on Test and Validation of High Speed Analog Circuits and the 2011 IEEE International Mixed-Signals, Sensors, and Systems Test Workshop. He also served in the Test Technology Technical Council (TTTC) Student Activities Group in 2009
J Electron Test (2012) 28:3–5
and 2010. He currently serves in the Technical Program Committees of the Design, Automation, and Test in Europe Conference and the IEEE International On-Line Testing Symposium. He was a Guest Editor of the Journal of Electronic Testing: Theory and Applications (JETTA) for the June 2011 Special Issue on Analog, Mixed-Signal, RF, and MEMS Testing. He received the Best Paper Award in the 2009 IEEE European Test Symposium.
Fabian Vargas obtained his Ph.D. Degree in Microelectronics from the Institut National Polytechnique de Grenoble
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(INPG), France, in 1995. In 2005, he spent a sabbatical year at the Technical University of Lisbon (INESC-ID / IST), Portugal. At present, he is Full Professor at the Catholic University (PUCRS) in Porto Alegre, Brazil. His main research domains involve the HW-SW co-design and test of system-on-chip (SoC) for critical applications; system-level design and methodologies for radiation and electromagnetic compatibility; and the embedded sensor design for characterization, quality, reliability, yield, and speed binning. Among several activities, Prof. Vargas has served as Technical Committee Member or Guest-Editor in many IEEE-sponsored conferences and journals. He holds 6 BR and international patents, co-authored a book and published over 200 refereed papers. Prof. Vargas is Full Researcher of the BR National Science Foundation since 1996. He cofounded the IEEE-Computer Society Latin American Test Technology Technical Council (LA-TTTC) in 1997 and the IEEE Latin American Test Workshop (LATW) in 2000. Prof. Vargas received the Meritorious Service Award of the IEEE Computer Society for providing significant services as chair of the IEEE Latin American Regional TTTC Group for six years and for chairing the LATW for several times. Prof. Vargas is a Golden Core Member of the IEEE Computer Society.
